GIST Scholar
College of Information and Computing
Department of Semiconductor Engineering
2. Conference Papers
First Demonstration of 1-bit Erase in Vertical NAND Flash Memory
- Type
- Conference Paper
- Citation
- 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, pp.304 - 305
- Issued Date
- 2022-06-12
- Abstract
- We propose for the first time a method for erasing one selected cell in Vertical NAND (VNAND) flash memory. By controlling the voltage applied to the terminals (switch devices and cells) of the VNAND string array, 1-bit erase (GIDL generation) of one selected cell and erase inhibition (GIDL suppression) of unselected cells are successfully verified. Compared to the existing method, the 1-bit erase method reduces the current fluctuation by 17 times at an IBL of 50 nA and reduces the Vth dispersion of >2 V to -0.2 V or less. © 2022 IEEE.
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Conference Place
- US
Honolulu
- Appears in Collections:
- Department of Semiconductor Engineering > 2. Conference Papers
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