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Hardware-based Neural Networks using a Gated Schottky Diode as a Synapse Device

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Author(s)
Lim, SuhwanBae, Jong-HoEum, Jai-HoLee, SungtaeKim, Chul-HeungKwon, DongseokLee, Jong-Ho
Type
Conference Paper
Citation
2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
Issued Date
2018-05-27
Abstract
A gated Schottky diode is proposed for high-performance synapse devices and a means of designing a neural network using this device is described. The proposed gated Schottky diode operates in the saturation region with respect to the input voltage and is therefore immune to input noise and enables accurate vector-by-matrix multiplication. Moreover, by applying identical pulses to the bottom gate to store charges in a storage layer, the reverse saturation current increases almost linearly. Considering these special characteristics, we propose an architecture that uses a time-modulated input pulse and a learning rule based on a single conductance step. A three-layer perceptron network is trained using the conductance response of the synapse device and unidirectional weight-updating methods. In simulations using this network, the classification accuracy rate of MNIST training sets was found to be 94.50%. Compared to memristive devices, the improved linearity of the conductance response in our device is evidence of its higher accuracy. © 2018 IEEE.
Publisher
Institute of Electrical and Electronics Engineers Inc.
Conference Place
IT
Florence
URI
https://scholar.gist.ac.kr/handle/local/34039
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