Reconfigurable Multifunctional Device Using Ferroelectric Floating Gate Structure
- Author(s)
- Seungbin Lee
- Type
- Thesis
- Degree
- Master
- Department
- 정보컴퓨팅대학 전기전자컴퓨터공학과
- Advisor
- Kang, Dong-Ho
- Abstract
- As the downscaling of conventional complementary metal–oxide–semiconductor (CMOS) transistors approaches fundamental physical limitations, increasing attention has been directed toward alternative device architectures that offer functionalities beyond simple switching. Among these, reconfigurable devices capable of dynamically modulating polarity, logic behavior, and memory functions are particularly promising. In this work, we propose and experimentally demonstrate a reconfigurable ferro-floating gate field-effect transistor (R-FFGFET) based on a van der Waals heterostructure, employing MoTe₂ as an ambipolar channel and In₂Se₃ as a ferroelectric floating gate. The device exhibits dual operation modes governed by distinct physical mechanisms: charge storage through the floating gate enables reversible and non-volatile reconfiguration among n-type, p-type, metallic, and insulating conduction states, while ferroelectric polarization switching allows gradual and low-voltage modulation of channel conductance. Comprehensive electrical characterization demonstrates that, in the floating gate mode, the device achieves stable non-volatile flash memory behavior, robust R-FET polarity control, and reconfigurable inverter and switch logic operations, whereas in the ferroelectric gate mode, low-voltage polarization switching enables well-defined synaptic characteristics, including long-term potentiation and depression. Furthermore, the experimentally extracted synaptic responses are incorporated into spiking neural network simulations, yielding a recognition accuracy of approximately 90% with 10,000 training samples from the MNIST dataset. These results establish the R-FFGFET as a multifunctional device platform that unifies reconfigurable logic, non-volatile memory, and neuromorphic computing within a single transistor architecture.
- URI
- https://scholar.gist.ac.kr/handle/local/33815
- Fulltext
- http://gist.dcollection.net/common/orgView/200000954072
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