Design of Low Power Amplifier-Shared Delta-Sigma Modulator with Self-Biased Inverter

Abstract

This paper proposes 2nd-order discrete delta-sigma analog-to-digital converter (ADC) for low-power-consuming image sensor application. To reduce power, each of the integrator blocks are realized in single self-biased inverter amplifier using different switch. Level shifting technique also adopted on the circuit and active summation of first and second integrator's output is generated after second stage's conversion. Moreover, correlated level shifting technique has applied because of low gain of inverter amplifier and this technique enhances the circuit's closed loop gain. This ADC has been designed with 0.18um CMOS process by Magnachip, and the performance result has 10.78 ENOB and 491.37 fJ/Conversion figure of merit by Cadence Virtuoso Spectre circuit simulation