Low Power Delta-Sigma Modulator using Inverter-Based Integrator with Gain Enhancement Technique

Abstract

This paper proposes low power delta-sigma modulator using inverter-based integrator. These days, devices are getting smaller and supply voltage of battery is getting smaller. It needs low power, high resolution performance with low supply voltage. Delta-sigma modulator is great to achieve high resolution ADC because of oversampling and noise shaping, but using operational transconductance amplifier (OTA), it limits the output of high resolution. Using inverter, one of low power technique, can settle the problem, but it restricts SQNR or other performance because of low gain of inverter. To resolve it, cross-couple level shifting technique is introduced to compensate error by low gain. For that reason, this paper discusses how one of the ADCs, the delta-sigma ADC, can reduce power and increase high resolution. This ADC has been designed with 0.18 um CMOS preocess by magna, and simulation performed by Cadence Virtuoso Spectre circuit simulation and MATLAB.