Fabrication and Characterization of Two Dimensional FET for the next-generation CMOS devices

Abstract

The development of CMOS technology has enabled the use of high-performance electronic devices. However, the power consumption increased sharply due to increased integration. In particular, the leakage current generated by diminution of the device take up a large part of the power consumption. Therefore, scaling has been carried out while maintaining the device performance by changing the structure and material of the MOSFET such as metal/high-k, fin channel, gate all around channel and nanowire. However, new devices are needed because the scaling of MOSFETs has become more difficult. Among the new devices, tunnel Field Effect Transistor (FET) is the most popular device. It is attracting attention because it has less than 60mV/dev swing which is difficult to reach the conventional MOSFET. However, the performance of real tunnel FET is still poor due to lower tunneling probability. So, experiments such as SiGe source, nanowire and vertical tunneling are being conducted to improve performance. Among them, experiment using have been studied, and studies using 2D materials have also been attracting attention. In this dissertation, the author has studied a 2D semiconductor that optimizes device performance using bandgap engineering for applying to tunnel FET.

In the first section, a system for transferring flakes was installed. In the case of the 2D material, since the growth method capable of high quality and large area is not optimized, the experiment using the flake obtained by the peeling method is being carried out. The PPC material was used as a polymer material to transfer flakes. The process was optimized so that the flake was not damaged during transcription and could be removed at low temperature. In the second section, the 2D/2D hetero structures were fabricated for achieved the low threshold swing. In case of MoS2/WSe2, the performance of device shows high Ion/Ioff(~10E6) and low off current. But the threshold swing is very poor(260mV/dec), this result needs to improvement. To improve the threshold swing, I fabricated the device using MoS2 and Black Phosporous(BP) with low bandgap to reduce the tunneling length. The results of MoS2/BP show the good performance which is high Ion/Ioff ratio(~107), low threshold swing(54mV/dec), and extreme low off current(10E-13A). In the third section, the WSe2 tunnel FET was fabricated using band gap control through overlapped dual-gate for using one material. The energy band gap is staggered by gate electric field and the carrier is injected into the narrow band gap. The behavior of current was observed differently depending on electrostatic doping. The device turned on very steeply(SS:5mV/dec) and the on/off ratio of current is very high (~10E7).