A 46GS/s 7-Bit Time-Interleaved Time-Domain ADC with Synthesizable Unit ADCs in 16nm FinFET

Abstract

A 7-bit 16-way time-interleaved time-domain analog-todigital converter (TDADC) is presented with unit ADCs synthesized using Verilog code and fully-automated standard digital place-and-route techniques. The proposed design introduces capacitor-based distortion compensation in the voltage-to-time converter and employs a novel 3-input time comparator with implicit phase interpolation in the fine time-to-digital converter to reduce power and area. Fabricated in 16 nm FinFET, the proposed ADC operates at 46 GS / s, achieves 78 fJ/ conv.-step at Nyquist, has 20.1 GHz 3 dB input bandwidth, and occupies 0.085 mm2 area. © 2025 JSAP.