High-Frequency Flux Controlled MOS-Based Floating Meminductor Emulator Maryaradhiya Daimari School of Information and Computing Gwangju Institute of Science and Technology

Abstract

This thesis presents a novel MOS-based meminductor emulator designed for high-frequency applications, with a focus on addressing fabrication challenges through emulation techniques. Utilizing 180 nm CMOS technology, the proposed emulator operates up to 10 MHz, with post-layout simulations demonstrating low area consumption (878.40 µm²) and power dissipation (0.47 mW). The emulator's architecture, which employs an Operational Transconductance Amplifier (OTA) and capacitors, successfully replicates the meminductor's pinched hysteresis loop in the current-flux plane, a key characteristic for memory behaviour. In addition, the study demonstrates the practical relevance of the proposed meminductor through its integration into a high-speed meminductor-based leaky integrate-and-fire (M-LIF) neuron. This neuron circuit, designed for neuromorphic pattern classification, achieves a spiking rate of 70 million spikes per second and an energy efficiency of 0.090 pJ/spike, outperforming existing designs in both speed and power. The system successfully implements digit classification using a 5×1 neuron array with minimal hardware overhead and no passive components. The emulator’s performance is also benchmarked against existing designs in terms of area, frequency, and power, highlighting significant improvements in scalability and efficiency. These results underscore the emulator’s suitability for energy-constrained applications, including adaptive filters, chaotic signal generators, and neuromorphic computing. Overall, this work advances the integration of meminductive behaviour into CMOS-compatible systems, paving the way for future monolithic IC designs in analog computing and intelligent communication platforms.