Design of Low-Power and High Slew-Rate Class-AB Amplifier

Abstract

This paper presents a low-power and high slew-rate Class-AB amplifier. The proposed amplifier is suitable for applications such as professional audio equipment, portable electronic devices, and biomedical systems. The power efficiency and high driving capability of Class-AB amplifiers contribute to extended battery life, support for high-speed operation, and reduction of crossover distortion. However, achieving both high power efficiency and high driving capability is challenging in conventional operational transconductance amplifiers (OTAs) due to the inherent trade-off between power consumption and driving capability. The slew rate is proportional to the current mirror ratio and the quiescent bias current. Enhancing the driving capability by increasing either of these factors often results in a larger parasitic capacitance at the output stage, which degrades the frequency response and increases power dissipation. To address this issue, the proposed Class-AB amplifier incorporates two additional current source circuits for adaptive biasing, configured in a parallel and symmetrical structure with respect to the tail current source of a conventional OTA. Plus, two compensation capacitors are connected between the output terminal and the current source circuit for Miller compensation to enhance the stability of the circuit’s operation. This architecture enables the amplifier to achieve improved performance compared to previous designs. The circuit was designed using the TSMC 0.18 μm CMOS process, and its implementation and simulation were carried out in Cadence Virtuoso using the Spectre simulator. Under a 1.8 V supply voltage and a 1 pF load capacitance, the amplifier achieved slew rates of +117 V/μs and –88 V/μs for the rising and falling edges, respectively, while consuming 3.5 mW of power.