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Spatial control of quantum sized nanocrystal arrays onto silicon wafers

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Author(s)
Choi, SJYi, DKChoi, JYPark, JBSong, IYJang, ELee, JIAn, MHong, JDYoon, SMShin, HJ
Type
Article
Citation
JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.7, no.12, pp.4285 - 4293
Issued Date
2007-12
Abstract
Monolayer arrays of monodispersed nanocrystals (< 10 nm) onto three dimensional (3D) substrates have considerable potential for various engineering applications such as highly integrated memory devices, solar cells, biosensors; and photo and electro luminescent displays because of their highly integrated features with nanocrystal homogeneity. However, most reports on nanocrystal arrays have focused on two dimensional (2D) flat substrates, and the production of wafer-scale monolayer arrays is still challenging. Here we address the feasibility of arraying nanocrystal monolayers in wafer-scale onto 3D substrates. We present both metal (Pd) and semiconductor (CdSe) nanocrystals arrayed in monolayer onto trenched silicon wafers (4 inch diameter) using a facile electrostatic adsorption scheme. In particular, CdSe nanocrystal arrays in the trench well showed superior luminescent efficiency compared to those onto the protruded trench flat, due to the densely arrayed CdSe nanocrystals in the vertical direction. Furthermore, the surface coverage controllability was investigated using a 2D silicon substrate. Our approach can be applied to generate highly efficient displays, memory chips and integrated sensing devices.
Publisher
AMER SCIENTIFIC PUBLISHERS
ISSN
1533-4880
DOI
10.1166/jnn.2007.884
URI
https://scholar.gist.ac.kr/handle/local/31764
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