Utilization of a Disturbance Observer for Enhancing Robustness Against DC Biases in a Virtual Synchronous Generator

Abstract

A virtual synchronous generator (VSG) can emulate the characteristics of synchronous generators with an inverter. However, VSGs may be vulnerable to synchronous oscillations, potentially undermining their reliability. This article considers dc biases arising in the analog-to-digital conversion process as the primary cause of synchronous oscillation, which may often be overlooked in the literature. When a VSG is based on the current-referencing electrified synchronous machine (CURESYM), a small-signal analysis is provided to highlight its limited capability to address synchronous oscillations. Namely, this analysis reveals that the extended state observer (ESO) implemented in the CURESYM can exacerbate these oscillations by reacting falsely to dc disturbances. To address this issue, a filter-based disturbance observer in the stationary reference frame is proposed to replace the ESO in the synchronous reference frame. Through diverse results obtained from hardware-in-the-loop tests and experiments, it is validated that the proposed method is simple and effective for making the CURESYM immune to ADC-related dc biases without using virtual resistances.