Development of Large Diameter Semiconducting Single-walled Carbon Nanotube-Adopted Solution Processed Field-effect Transistors

Abstract

Semiconducting single-walled carbon nanotubes (s-SWNTs) are highly desirable as an active layer of field-effect transistors (FETs) owing to their exceptional electrical, mechanical, and optical properties for various electronic applications. However, utilizing solution-processable s-SWNTs in FETs requires further improvements in mobility enhancement and reduced operating voltage while maintaining on/off ratio. This study focuses on enhancing the performance of large diameter s-SWNTs as the active layer in FETs to address these challenges. While p-type performance of s-SWNT-FETs can be easily achieved by exposure to air accompanied by time and pressure control, achieving high-performance n-type behavior requires additional research. Moreover, low-voltage operation is crucial for applying s-SWNT-FETs in various devices, including wearable electronics. In this thesis, we introduce doping in solution processed s-SWNT random network to enhance n-type performance. We have also confirmed the stability of doped flexible devices. Additionally, the use of high dielectric constant insulating layer in s-SWNT-FETs enables low-voltage operation.

Chapter 1 describes a general introduction and fundamentals of carbon nanotubes, insulating polymers and field-effect transistors

In Chapter 2, utilization the spin coating method to form networks from selectively sorted s-SWNTs, aiming for scalable electronic device fabrication. The one-dimensional nature of s-SWNTs introduces significant roughness and charge trap sites, hindering charge transport due to van der Waals gap (~0.32 nm) between nanotubes. Addressing this, explored the effects of anion doping on the spin coated s-SWNT random network, with a focus on the influence of small size of halogen anions (0.13 – 0.22 nm) on these electronic properties. Raman and ultraviolet-visible-near infrared optical spectroscopy results indicate that smaller anions significantly enhance doping effects through strong non-covalent anion-π interactions, improving charge transport and carrier injection efficiency in s-SWNTs, especially for n-type operation. This improvement is inversely proportional to size of the halogen anions, with the smallest anion (fluorine) effectively transitioning the electrical characteristics of s-SWNT network from ambipolar to n-type by reducing both junction and contact resistances through anion doping, based on anion-π interaction.

In Chapter 3, description of the n-type performance enhancement by large diameter s-SWNT network by anion doping. High-performance n-type s-SWNT-FETs are achieved by chemical doping using anion-π interaction between SWNT and anion of tetrabutylammonium fluoride (TBAF) salt. The Fermi level (EF) of s-SWNT shifts to the conduction band edge with increasing dopant concentration. The doped s-SWNT-FETs exhibit significant improvement in electron mobility (39.4 cm2V-1s-1) with high current on/off ratio (>104) compared to those of un-doped device. The doping using anion–π interaction leads to populate electron density of channel and reduces both channel and contact resistance by 99.0% and 99.6%. Excess carriers introduced by the doping compensate traps by shifting the EF toward conduction band edge. The doped device showed improved current stability after 10 h of bias stress test, while the current of undoped FET decreased by 40.4%. Finally, flexible FETs with TBAF doped s-SWNT network are demonstrated on polyethylene naphthalate substrate and show stable operation after 2000 times bending test.

In Chapter 4, description of s-SWNT-FETs with an optimized high-k relaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness for low-voltage operation will be introduced. The s-SWNT-FETs with an optimized thickness (~ 800 nm) of the high-k insulator exhibited the highest average mobility of 14.4 cm2V-1s-1 at the drain voltage (ID) of 1 V, with a high current on/off ratio (Ion/off >105). The optimized device performance resulted from the suppressed gate leakage current (IG) and a sufficiently large capacitance (> 50 nFcm-2) of the insulating layer. Despite the extremely high capacitance (> 100 nFcm-2) of the insulating layer, an insufficient thickness (< 450 nm) induces a high IG, leading to reduced ID and mobility of s-SWNT-FETs. Conversely, an overly thick insulator (> 1200 nm) cannot introduce sufficient capacitance, resulting in limited device performance. The large capacitance and sufficient breakdown voltage of the insulating layer with an appropriate thickness significantly improved p-type performance. However, a reduced n-type performance was observed owing to the increased electron trap density caused by fluorine proportional to the insulator thickness. Hence, precise control of the insulator thickness is crucial for achieving low-voltage operation with enhanced s-SWNT-FET performance.