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Abstract: DRAM devices are an essential component of most digital devices and play a critical role in the advancement of cloud computing, edge computing and artificial intelligence. The demand for higher density, higher speed and lower leakage transistors in DRAM devices continues. However, silicon-based semiconductors are reaching the limits of performance improvement and IGZO DRAM is being proposed as a new alternative. IGZO DRAM is characterized by ultra-low leakage current, mainly due to its wide energy bandgap, but IGZO DRAM has a large bit cell area when implemented as a planar FET structure. To address this, cylindrical 2T0C IGZO DRAM has been proposed and a simulator for it is needed. In this thesis, we have developed an in-house device simulator for cylindrical IGZO DRAM and used it to computationally investigate the electrical characteristics of the DRAM. The simulator uses Poisson’s equation, drift-diffusion (DD) as the governing equation, and considers channel traps to simulate IGZO characteristics. For efficient calculation of cylindrical devices, a quasi-2D device simulator has been developed using a cylindrical coordinate system. Finally, the thesis proposes an optimized device based on multiple simulations.

Appears in Collections:: Department of Electrical Engineering and Computer Science > 3. Theses(Master)

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