Design of Low-Power Delta-Sigma Modulator using Floating Inverter Amplifier

Abstract

This paper proposes a discrete-time delta-sigma modulator (DSM) for low-power applications. To achieve low power consumption and high resolution at the same time, the cascoded floating inverter amplifiers (FIAs) are used to realize each switched-capacitor (SC) integrator. Basically, because of the dynamic operation, the FIA is more power-efficient than typical operational transconductance amplifier (OTA) biased at a large static current. By utilizing the cascoded FIA arrangement, the noise performance of DSM can be optimized because the input-referred noise is lower than two-stage FIA and DC gain is higher than single-stage, non-cascoded FIA. Moreover, due to the operation of FIA, it achieves robustness against the input common-mode voltage variation and stability of the output common-mode voltage without using a calibration circuit, which leads to the power and area saving. The proposed DSM has been designed with 0.18μm 1-Poly 6-Metal CMOS process by MagnaChip, and simulation is performed by CADENCE Virtuoso Spectre circuit simulation tool and MATLAB.