OAK

Login OAK 국가리포지터리
검색

GIST Repository College of Information and Computing Department of Electrical Engineering and Computer Science 1. Journal Articles

Settling time optimization technique for binary-weighted digital-to-analog converter

Metadata Downloads
Abstract
Settling behavior of the binary-weighted switched-capacitor digital-to-analog converter output is analyzed and a design method for fast settling is presented. A calibration circuit that effectively reduces settling time beyond the process limit is also proposed and verified with various simulations.
Author(s)
Kim, Hyo-jong; Seo, Donghwan; Lee, Byung-geun
Issued Date
2014-03
Type
Article
DOI
10.1587/elex.11.20140132
URI
https://scholar.gist.ac.kr/handle/local/15233
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Citation
IEICE Electronics Express, v.11, no.6
ISSN
1349-2543
Appears in Collections:
Department of Electrical Engineering and Computer Science > 1. Journal Articles
공개 및 라이선스
  • 공개 구분공개
파일 목록

  • 관련 파일이 존재하지 않습니다.

qrcode

Items in Repository are protected by copyright, with all rights reserved, unless otherwise indicated.

GIST Repository는 국립중앙도서관 OAK Repository 보급사업으로 구축되었습니다.