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Digitally controlled single-inductor multiple-output synchronous DC-DC boost converter with smooth loop handover using 55 nm process

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Abstract
This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture. © 2017 KIPE.
Author(s)
Hayder, Abbas SyedPark, Young-JunKim, Sang YunPu, Young-GunYoo, Sang-SunYang, YoungooLee, MinjaeHwang, Keum ChoelLee, Kang-Yoon
Issued Date
2017-05
Type
Article
DOI
10.6113/JPE.2017.17.3.821
URI
https://scholar.gist.ac.kr/handle/local/13755
Publisher
전력전자학회
Citation
Journal of Power Electronics, v.17, no.3, pp.821 - 834
ISSN
1598-2092
Appears in Collections:
Department of Electrical Engineering and Computer Science > 1. Journal Articles
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