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Design of a High Efficiency DC-DC Buck Converter With Two-Step Digital PWM and Low Power Self-Tracking Zero Current Detector for IoT Applications

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Abstract
In this paper, a high efficiency dc-dc buck converter with two-step digital pulse width modulation (DPWM) and low power self-tracking zero current detector (ST-ZCD) is proposed for Internet of Things (IoT) and ultralow power applications. The hybrid DPWM core with high linearity and low power consumption is proposed to implement the high efficiency DPWM dc-dc converter. It is composed of a two-step delay control using the counter and delay line. An adaptive window analog to digital converter is proposed to reduce the output voltage ripple within 20 mV. A dead time generator is implemented with the proposed ST-ZCD to minimize the reverse current. The ST-ZCD can improve efficiency by reducing the control loss that accounts for a large proportion of the dc-dc converter. Also, all digital type-III compensator is implemented for the low power and small die area. This chip is fabricated with a 55 nm CMOS process, which uses the standard supply voltage of 1.5-3 V to generate the output voltage of 1.2 V. The total active area is 500 mu m x 300 mu m. The measured peak efficiency of the DPWM dc-dc buck converter is 91.5% with a quiescent current consuming only 130 mu A.
Author(s)
Kim, Sang-YunPark, Young-JunAli, ImranTruong Thi Kim NgaRyu, Ho-CheolKhan, Zaffar Hayat NawazPark, Seong-MunPu, Young GunLee, MinjaeHwang, Keum CheolYang, YoungooLee, Kang-Yoon
Issued Date
2018-02
Type
Article
DOI
10.1109/TPEL.2017.2688387
URI
https://scholar.gist.ac.kr/handle/local/13422
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE Transactions on Power Electronics, v.33, no.2, pp.1428 - 1439
ISSN
0885-8993
Appears in Collections:
Department of Electrical Engineering and Computer Science > 1. Journal Articles
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