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A design of a 5.6 GHz frequency synthesizer with switched bias LIT VCO and low noise on-chip LDO regulator for 5G applications

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Author(s)
Kim, SungJinCheon, Ji-HyeonLee, DongSooPu, YoungGunYoo, Sang-SunLee, MinjaeHwang, Keum CheolYang, YoungooLee, Kang-Yoon
Type
Article
Citation
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, v.47, no.11, pp.1856 - 1868
Issued Date
2019-11
Publisher
WILEY
ISSN
0098-9886
DOI
10.1002/cta.2687
URI
https://scholar.gist.ac.kr/handle/local/12502
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