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A Background M-Channel Time-Interleaved ADC Calibration for Multilevel Modulations Based on the Probability Density Function Difference and a Greedy Algorithm

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Abstract
This paper presents the first time-interleaved analog-to-digital background calibration targeted for multilevel modulations that can calibrate offset, gain, time skew and bandwidth mismatches (to the author's knowledge). The mismatch errors are estimated based on the interleaving channels histograms. Moreover, the proposed calibration can be adapted to any interleaving factor with a multiplication-less estimation logic based on a greedy algorithm. Numerical simulations show satisfactory performance improvements for a 2-level, a 4-level and an 8-level symbol transmission, along with 4-channel and 32-channel TI-ADC interleaving orders. Furthermore, a new SNDR formula is derived considering all the TI-ADC mismatch distortions that can be compared with the obtained results. The measurement results show the proposed calibration working under a binary PRBS31 pattern with both a 3.6 GS/s and 7.2 GS/s signaling rates for a 3.6 GS/s 2-channel TI-ADC experimental board.
Author(s)
Tavares, Yang A.Kim, SeunghyunLee, Minjae
Issued Date
2022-08
Type
Article
DOI
10.1109/TSP.2022.3198552
URI
https://scholar.gist.ac.kr/handle/local/10673
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation
IEEE TRANSACTIONS ON SIGNAL PROCESSING, v.70, pp.4140 - 4155
ISSN
1053-587X
Appears in Collections:
Department of Electrical Engineering and Computer Science > 1. Journal Articles
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