OAK

GIST Library Login

GIST Scholar

Browsing by Researcher : 이민재

All A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하

or enter first few letters:

Sort by:
In order:
Results/Page:
Number of authors displayed:

Showing results 1 to 20 of 104

1 Thesis 12-bit 250 MS/s 28 mW +70 dB SFDR Non-50% RZ DAC and Modeling Random Clock Jitter Effect in NRZ and RZ DACs Seonggeon Kim 2019
2 Article 260-mu W DCO With Constant Current Over PVT Variations Using FLL and Adjustable LDO Abbasizadeh, Hamed ; Ali, Imran ; Rikan, Behnam Samadpoor ; et al 2018-06
3 Article 40 dB-isolation, 1.85 dB-insertion loss full CMOS SPDT switch with body-floating technique and ultra-small active matching network using on-chip solenoid inductor for BLE applications Nga, T.T.K. ; Lee, D. ; Kim, S. ; et al 2018-11
4 Article 5th-Order Continuous-Time Low-Pass Filter Achieving 56 MHz Bandwidth 30.5 dBm IIP3 with a Novel Low-Distortion Amplifier Park, Changjoo ; Tavares, Yang Azevedo ; Lee, Junyong ; et al 2021-06
5 Conference Paper 9.9 A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common Mode Lee, Sewon ; Kang, Hyein ; Lee, Minjae 2024-02-20
6 Article A 0.9V Self-Referenced Resistor-Based Temperature Sensor With −0.62/+0.81°C (3σ) Inaccuracy Kim, Junho ; Lee, Sinho ; Lee, Minjae 2023-12
7 Article A 1 V 10-bit highly linear and monotonic digital-to-time converter with 0.066-LSB DNL utilizing a glitch-free dual reset method and switchable supply regulation scheme Jung, Inho ; Bae, Sunghyun ; Lee, Sinho ; et al 2022-07
8 Article A 1.1ÂV 10-bit 62MS/s pipeline ADC with two-step non-overlapping clock generation for multi I-Q channel RF receivers Ju, Hyungyu ; Lee, Minjae 2016-06
9 Article A 1.2V 30 MS/s SAR ADC with Foreground Capacitor Calibration 주현규 ; 이세원 ; 이민재 2019-04
10 Article A 1.8 v 18.13 mhz inverter-based on-chip RC oscillator with flicker noise suppression using logic transition voltage feedback Ko, Junsoo ; Lee, Minjae 2019-11
11 Article A 10- and 12-Bit multi-channel hybrid type successive approximation register analog-to-digital converter for wireless power transfer system Rikan, B.S. ; Kim, S.-Y. ; Abbasizadeh, H. ; et al 2018-10
12 Article A 10-bit 1 MS/s segmented Dual-Sampling SAR ADC with reduced switching energy Rikan, Behnam Samadpoor ; Abbasizadeh, Hamed ; Park, Young-Jun ; et al 2017-12
13 Article A 12 bit 250 MS/s 28 mW+70 dB SFDR non-50% RZ DAC in 0.11 mu m CMOS using controllable RZ window for wireless SoC integration Kim, Seonggeon ; Kang, Jaehyun ; Lee, Minjae 2016-10
14 Article A 12-bit 40-MS/s SAR ADC with Calibration-Less Switched Capacitive Reference Driver Ju, Hyungyu ; Lee, Sewon ; Lee, Minjae 2020-11
15 Thesis A 12-bit 40-MS/s SAR ADC with Calibration-less Switched Capacitive Reference Driver Hyungyu Ju 2020
16 Article A 13 bit 4MS/s SAR ADC with energy-efficient bidirectional delay generation Lee, Sewon ; Kang, Hyein ; Lee, Minjae 2025-11
17 Thesis A 13-bit 1 MS/s SAR ADC with unpinned sampling clock Jiwon Woo 2020
18 Article A 13-Bit 1-MS/s SAR ADC With Completion-Aware Background Capacitor Mismatch Calibration Bae, Sunghyun ; Lee, Sewon ; Seong, Siheon ; et al 2023-09
19 Article A 13-bit 3-MS/s Asynchronous SAR ADC with a Passive Resistor Based Loop Delay Circuit Ju, Hyungyu ; Lee, Minjae 2019-02
20 Thesis A 13-bit SAR ADC with Wide Input Common-Mode Complementary Split Pre-Amplifier Comparator and Grounded-Finger CDAC Sewon Lee 2026

1 2 3 4 5 6 > >>

OAK GIST Scholar was built as a Argonet.